MESSAGE
DATE | 2014-12-16 |
FROM | Ruben Safir
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SUBJECT | Subject: [LIU Comp Sci] [mrbrklyn@panix.com: HW Last one maybe 6?]
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From owner-learn-outgoing-at-mrbrklyn.com Tue Dec 16 15:36:00 2014 Return-Path: X-Original-To: archive-at-mrbrklyn.com Delivered-To: archive-at-mrbrklyn.com Received: by mrbrklyn.com (Postfix) id 1864616115E; Tue, 16 Dec 2014 15:36:00 -0500 (EST) Delivered-To: learn-outgoing-at-mrbrklyn.com Received: by mrbrklyn.com (Postfix, from userid 28) id F3BFD161162; Tue, 16 Dec 2014 15:35:59 -0500 (EST) Delivered-To: learn-at-nylxs.com Received: from mailbackend.panix.com (mailbackend.panix.com [166.84.1.89]) by mrbrklyn.com (Postfix) with ESMTP id 1D45316115E for ; Tue, 16 Dec 2014 15:35:58 -0500 (EST) Received: from panix2.panix.com (panix2.panix.com [166.84.1.2]) by mailbackend.panix.com (Postfix) with ESMTP id 7CD3213F41 for ; Tue, 16 Dec 2014 15:35:57 -0500 (EST) Received: by panix2.panix.com (Postfix, from userid 20529) id 5719B33C60; Tue, 16 Dec 2014 15:35:57 -0500 (EST) Date: Tue, 16 Dec 2014 15:35:57 -0500 From: Ruben Safir To: learn-at-nylxs.com Subject: [LIU Comp Sci] [mrbrklyn-at-panix.com: HW Last one maybe 6?] Message-ID: <20141216203557.GA29788-at-panix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=unknown-8bit Content-Disposition: inline Content-Transfer-Encoding: 8bit User-Agent: Mutt/1.5.23 (2014-03-12) Sender: owner-learn-at-mrbrklyn.com Precedence: bulk Reply-To: learn-at-mrbrklyn.com
----- Forwarded message from Ruben Safir -----
Date: Wed, 10 Dec 2014 02:13:48 -0500 From: Ruben Safir To: Samir Iabbassen Subject: HW Last one maybe 6? User-Agent: Mutt/1.5.23 (2014-03-12)
It is very hard to extract this from Blackboard.
Do you want a read webserver. I will give you one, plus HTML lessons to boot free
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Review Submission History: HW 6 Content ins Assignment Instructions
Enabled: Statistics Tracking
- 1 What are the typical elements of a machine instruction?
Optcode, Source Operand References, Result Operand Refences, Next Instruction References
2 What types of locations can hold source and destination operands?
Memory and Registers immediate in the instruction and in I/O device
3 If an instruction contains four addresses, what might be the purpose of each address? One for destination, two for source, snf one for the next instruction. But other senerios are possible/ two might be a register with a segment and the offset address can be immediate to the instruction, along with a destination and another source.
4 List and briefly explain five important instruction set design issues. Operation repertoire: How many and which operations to provide, and how complex operations should be. This includes a bunch of issues regarding CPU complexity, OS provledges, the optimal number of registers, and mamory mapping schemes
Data types: The various types of data upon which operations are performed: Comp2 seems beloved and there is IEEE floats, and flag bits
Instruction format: Instruction length (in bits), number of addresses, size of various fields, and so on This affects K, memory sets that can be seen, and direct mapping schemes. There are also cache memory access issue.
Registers: Number of processor registers that can be referenced by instructions, and their use. There is also the issue of register specialization and register size
Addressing: The mode or modes by which the address of an operand is specified. You have paging and frames. And then you have segments. Then there is I/O mapping issues and other roms
5 What types of operands are typical in machine instruction sets?
Numbers, chars and logical
6 What is the relationship between the IRA character code and the packed decimal representation?
They share the binary representation of the digits . In the IRA they are prefixed with 011 and then the packet digit code
7 What is meant by the term nesting of procedures?
Unlike some high level languages nesting procedures in 80x86 assembly language doesn't serve any useful purpose. If you nest a procedure (as with InsideProc above) you'll have to code an explicit jmp around the nested procedure. Placing the nested procedure after all the code in the outside procedure (but still between the outside proc/endp directives) doesn't accomplish anything. Therefore there isn't a good reason to nest procedures in this manner. Whenever you nest one procedure within another it must be totally contained within the nesting procedure. That is the proc and endp statements for the nested procedure must lie between the proc and endp directives of the outside nesting procedure. That is the spec. It is hiding a procedure within a procedure
12.14 What is the difference between big endian and little endian? They are backwards to each other with the significant bits on opposity sides of words.
8 Compare zero-, one-, two-, and three-address machines by writing programs to compute10X = (A + B * C)/(D - E * F) 0)push E push F MUL Push D Sub push c push b mul push a add ,Div,pop X
1)Load E, MUL F, store X, load D sub X store X, load B, mul c, add A, div X, store X 2) mul b, c, add b, a, mul E,F, sub d,e, div b,d, mov x,b 3) mul P, b,c ; add T, P,C; MUL P, E, F; SUB B, D,P; DIV X,T,B
the last question involes lots of creative uses of subtraction and it will need 2 more weeks if you want correct answers sub y sub y sub x sub z sub x
like that.
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